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Title: Performance analysis of multi walled carbon nanotube (MWCNT) bundle as VLSI interconnects
Authors: Agrawal, Shilpa
Rai, Mayank Kumar (Guide)
Keywords: CNT;Multiwalled CNT;Interconnects;SWCNT;MWCNT;electronics and communication;ECE;VLSI
Issue Date: 25-Aug-2015
Abstract: The development of VLSI technology is rapidly advancing into deep submicron domain due to reduction in feature sizes and bringing complexity at the silicon level. As a result, logic components in a microprocessor have shown dramatic performance improvement. On the other hand, on-chip interconnect designing is an increasing gridlock in nanometer-scale VLSI design which is dominating the gate delay. Currently, copper is used as a VLSI interconnects material. As technology scales down, its performance degrades due to various factors such as electro migration, surface scattering and grain boundary scattering. Carbon nanotubes have been preferred as substitute for the future nodes due to their special physical characteristics. They provide high thermal and mechanical stability and have large current carrying capacity over copper. In this dissertation, temperature dependent performance analysis of MWCNT bundle as VLSI interconnects has been analyzed. The average improvement in delay, power and PDP using thermally aware model of CNT bundle and copper interconnect in comparison with temperature independent model is compared. The temperature dependent circuit parameters and performance analysis in terms of delay, power dissipation and power delay product (PDP) of single walled carbon nanotube (SWCNT) bundle interconnect and multi walled carbon nanotube (MWCNT) bundle interconnect have been analyzed using temperature dependent equivalent circuit model. Results obtained through these analyses at 22nm technology node over a temperature range from 300K to 450K are compared with conventional metal (copper) interconnect. The effects of various parameters such as interconnect length on propagation delay, power and PDP have also been analyzed. The SPICE simulation results reveal that at temperature variation ranging from 300K to 450K, compared to bundle of CNT with copper interconnects, delay in CNT bundle is low at different interconnect lengths ranging from 100um to 1000um whereas reverse is true for power dissipation. Simulated results also reveal that with rise in temperature, MWCNT bundle has less delay as compared with SWCNT bundle for global level (> 700μm) of interconnect lengths and vice versa for local level (≥100μm) of interconnects. However, with rise in temperature, MWCNT bundle dissipates less power than SWCNT bundle for all interconnect lengths. Based on simulation results, the thermally aware model of SWCNT bundle achieved improvement in delay, power and PDP estimation accuracy whereas reverse is true for iv MWCNT bundle. Based on these comparative results, the temperature dependent SWCNT bundle is an encouraging alternative to MWCNT bundle and copper interconnect.
Description: M.Tech.VLSI-Thesis
Appears in Collections:Masters Theses@ECED

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